Publications

Conference Papers:

  • [C30] Mohsen Imani, Saransh Gupta, Yeseong Kim, and Tajana Rosing, "Digital-based Processing In-Memory for Acceleration of Unsupervised Learning," GOMACTech Conference, 2021.

  • [C29] Minxuan Zhou, Mohsen Imani, Yeseong Kim, Saransh Gupta, Tajana Rosing, "DP-Sim: A Full-stack Simulation Infrastructure for Digital Processing In-Memory Architectures," 26th Asia and South Pacific Design Automation Conference (ASP-DAC), 2021.
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  • [C28] Mohsen Imani, Saikishan Pampana, Saransh Gupta, Minxuan Zhou, Yeseong Kim, and Tajana Rosing, "DUAL: Acceleration of Clustering Algorithms using Digital-based Processing In-Memory," IEEE/ACM International Symposium on Microarchitecture (MICRO), 2020.
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  • [C27] Saransh Gupta, Mohsen Imani, Behnam Khaleghi, Niema Moshiri, and Tajana S. Rosing, "RAPIDx: A ReRAM Processing in-Memory Architecture for DNA Short Read Alignment," 70th Virtual Meeting of The American Society of Human Genetics (ASHG), 2020.

  • [C26] Saransh Gupta, Justin Morris, Mohsen Imani, Ranganathan Ramkumar, Jeffrey Yu, Aniket Tiwari, Baris Aksanli, and Tajana Rosing, "THRIFTY: Training with Hyperdimensional Computing across Flash Hierarchy," IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2020.
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  • [C25] Rosario Cammarota, Matthias Schunter, Anand Rajan, Fabian Boemer, Ágnes Kiss, Amos Treiber, Christian Weinert, Thomas Schneider, Emmanuel Stapf, Ahmad-Reza Sadeghi, Daniel Demmler, Huili Chen, Siam Umar Hussain, Sadegh Riazi, Farinaz Koushanfar, Saransh Gupta, Tajan Simunic Rosing, Kamalika Chaudhuri, Hamid Nejatollahi, Nikil Dutt, Mohsen Imani, Kim Laine, Anuj Dubey, Aydin Aysu, Fateme Sadat Hosseini, Chengmo Yang, Eric Wallace, Pamela Norton, "Trustworthy AI Inference Systems: An Industry Research View," arXiv preprint arXiv:2008.04449, 2020.
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  • [C24] Justin Morris, Yilun Hao, Saransh Gupta, Ranganathan Ramkumar, Jeffrey Yu, Mohsen Imani, Baris Aksanli, and Tajana Rosing, "Multi-label HD Classification in 3D Flash," IFIP/IEEE International Conference on VLSI and System-on-Chip (VLSI-SoC), 2020. (invited paper)
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  • [C23] Saransh Gupta, Mohsen Imani, Hengyu Zhao, Fan Wu, Jishen Zhao, and Tajana Rosing, "Implementing Binary Neural Networks in Memory with Approximate Accumulation," ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2020.
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  • [C22] Hamid Nejatollahi*, Saransh Gupta*, Mohsen Imani, Tajana Simunic Rosing, Rosario Cammarota, and Nikil Dutt, "CryptoPIM: In-memory Acceleration for Lattice-based Cryptographic Hardware," IEEE/ACM Design Automation Conference (DAC), 2020. (*equal contribution, best paper candidate)
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  • [C21] Saransh Gupta, Mohsen Imani, Joonseop Sim, Andrew Huang, Fan Wu, M. Hassan Najafi, and Tajana Rosing, "SCRIMP: A General Stochastic Computing Architecture using ReRAM in-Memory Processing," IEEE Design, Automation, and Test in Europe Conference (DATE), 2020.
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  • [C20] Mohsen Imani, Mohammad Samragh, Yeseong Kim, Saransh Gupta, Farinaz Koushanfar, and Tajana Rosing, "Deep Learning Acceleration with Neuron-to-Memory Transformation," IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2020.
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  • [C19] Mohsen Imani, Saransh Gupta, Yeseong Kim, and Tajana S. Rosing, "FloatPIM: In-Memory Acceleration of Deep Neural Network Training with High Precision," IEEE International Symposium on Computer Architecture (ISCA), 2019.
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  • [C18] Mohsen Imani, Yeseong Kim, Thomas Worley, Saransh Gupta, and Tajana S. Rosing, "HDCluster: An Accurate Clustering Using Brain-Inspired High-Dimensional Computing," IEEE/ACM Design, Automation, and Test in Europe Conference (DATE), 2019.
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  • [C17] Minxuan Zhou, Mohsen Imani, Saransh Gupta, Yeseong Kim, and Tajana Rosing, "Thermal-Aware Design and Management for Search-based In-Memory Acceleration," IEEE/ACM Design Automation Conference (DAC), 2019.
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  • [C16] Mohsen Imani, Yeseong Kim, Saransh Gupta, Daniel Peroni, and Tajana S. Rosing, "In-Memory Acceleration of Deep Neural Network," GOMACTech Conference, 2019.

  • [C15] Saransh Gupta, Mohsen Imani, Behnam Khaleghi, Venkatesh Kumar, and Tajana S. Rosing, "RAPID: A ReRAM Processing in Memory Architecture for DNA Sequence Alignment," International Symposium on Low Power Electronics and Design (ISLPED), 2019.
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  • [C14] Mohsen Imani, Saransh Gupta, and Tajana Rosing, "Digital-based Processing In-Memory: A Highly-Parallel Accelerator for Data Intensive Applications," ACM International Symposium on Memory Systems (MEMSYS), 2019.
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  • [C13] Mohsen Imani, Sahand Salamat, Saransh Gupta, Jiani Huang, and Tajana S. Rosing, "FACH: FPGA-based Acceleration of Hyperdimensional Computing by Reducing Computational Complexity," 24th Asia and South Pacific Design Automation Conference (ASP-DAC), 2019.
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  • [C12] Minxuan Zhou, Mohsen Imani, Saransh Gupta, and Tajana Rosing, "GRAM: Graph Processing in a ReRAM-based Computational Memory," 24th Asia and South Pacific Design Automation Conference (ASP-DAC), 2019.
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  • [C11] Saransh Gupta, Mohsen Imani, and Tajana Rosing, "Exploring Processing In-Memory for Different Technologies," ACM Great lakes symposium on VLSI (GLSVLSI), 2019.
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  • [C10] Joonseop Sim*, Saransh Gupta*, Mohsen Imani, Yeseong Kim, and Tajana S. Rosing, "UPIM : Unipolar Switching Logic for High Density Processing-in-Memory Applications," ACM Great lakes symposium on VLSI (GLSVLSI), 2019. (*equal contribution)
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  • [C9] Mohsen Imani, Saransh Gupta, Yeseong Kim, Minxuan Zhou, and Tajana S. Rosing, "DigitalPIM: Digital-based Processing In-Memory for Big Data Acceleration," ACM Great lakes symposium on VLSI (GLSVLSI), 2019.
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  • [C8] Joonseop Sim, Minsu Kim, Yeseong Kim, Saransh Gupta, Behnam Khaleghi, and Tajana Rosing, "MAPIM: Mat Parallelism for High Performance Processing in Non-volatile Memory Architecture," IEEE International Symposium on Quality Electronic Design (ISQED), 2019.
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  • [C7] Saransh Gupta, Mohsen Imani, and Tajana Rosing, "FELIX: Fast and Energy-Efficient Logic in Memory," IEEE/ACM International Conference On Computer Aided Design (ICCAD), 2018.
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  • [C6] Mohsen Imani, Saransh Gupta, and Tajana Rosing, "GenPIM: Generalized Processing In-Memory to Accelerate Data Intensive Applications," IEEE/ACM Design, Automation, and Test in Europe Conference (DATE), 2018.
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  • [C5] Minxuan Zhou, Mohsen Imani, Saransh Gupta, and Tajana Rosing, "GAS: A Heterogeneous Memory Acceleration for Graph Processing," IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), 2018.
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  • [C4] Mohsen Imani, Ricardo Garcia, Saransh Gupta, and Tajana Rosing, "RMAC: Runtime Configurable Floating Point Multiplier for Approximate Computing," IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), 2018.
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  • [C3] Sahand Salamat, Mohsen Imani, Saransh Gupta, and Tajana S. Rosing, "RNSnet: In-Memory Neural Network Acceleration Using Residue Number System," IEEE International Conference on Rebooting Computing (ICRC), 2018.
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  • [C2] Mohsen Imani, Saransh Gupta, and Tajana Rosing, "Ultra-Efficient Processing In-Memory for Data Intensive Applications," IEEE/ACM Design Automation Conference (DAC), 2017.
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  • [C1] Mohsen Imani, Saransh Gupta, Atl Arredondo, and Tajana Rosing, "Efficient Query Processing in Crossbar Memory," International Symposium on Low Power Electronics and Design (ISLPED), 2017.
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Journal Papers:

  • [J5] Saransh Gupta, Mohsen Imani, Harveen Kaur, and Tajana Rosing, "NNPIM: A Processing In-Memory Architecture for Neural Network Acceleration," IEEE Transaction on Computers, 2019.
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  • [J4] Mohsen Imani, Ricado Garcia, Saransh Gupta, and Tajana S. Rosing, "Hardware-Software Co-design to Accelerate Neural Network Applications," ACM Journal on Emerging Technologies in Computing (JETC), 2019.
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  • [J3] Mohsen Imani, Xunzhao Yin, John Messerly, Saransh Gupta, Michael Niemier, Xiaobo Sharon Hu, and Tajana Rosing, "SearcHD: A Memory-Centric Hyperdimensional Computing with Stochastic Training," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2019.
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  • [J2] Mohsen Imani, Saransh Gupta, Sahil Sarama, and Tajana Rosing, "NVQuery: Efficient Query Processing in Non-Volatile Memory," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2019.
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  • [J1] Nishil Talati, Saransh Gupta, Pravin Mane, and Shahar Kvatinsky, "Logic design within memristive memories using memristor-aided loGIC (MAGIC)," IEEE Transactions on Nanotechnology, 2016.
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Master's Thesis:

  • Processing in Memory using Emerging Memory Technologies PDF
    University of California San Diego, 2018
    Advisor: Prof. Tajana S. Rosing

Contact

  • sgupta at ucsd.edu
  • Room 2148, Computer Science and Engineering Building (EBU3B), La Jolla, CA 92093